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Set Up and Operation
1.2.7
FAULT Protection
The following FAULT protection is provided which automatically disables all firing
independent of the inputs on the 37-pin connector.
TABLE 1-4:
FAULT PROTECTION
Fault Source
R, Y, B Bottom Switch Current
DC Bus Current
DC Bus Voltage
Brake Switch Current
Heat sink Over Temperature
Isolated DC Input Current Feedback
R, Y Isolated Phase Current Feedback
Nominal Trip
Level
±4.8A*
±4.8A*
410V
+4.9A
65°C (150F)
+8.9A
±4.4A
LED Indicator
Shunt Overcurrent
Over Voltage
Brake Overcurrent
Over Temperature
Hall Overcurrent
* If a large rate of change of current occurs due to the use of a load with low inductance, the
voltage across the self-inductance of the shunts will cause trips to occur at a lower level
than that stated.
To reset a FAULT, assert the ISO_RESET line of the 37-pin connector. This should be
done for a minimum time of 2 μ s. The RESET must be carried out in coordination with
the SPI handling routine of the dsPIC device to ensure correct synchronization of the
Note:
1.2.8
If SHUNT OVERCURRENT trips are occurring, but not HALL
OVERCURRENT trips, this may indicate that an inverter Shoot Through is
occurring. The user should immediately remove AC power from the system
and check that the correct 2 μ s dead time exists on the inverter firing signals
using an oscilloscope.
Operation at Low Output Frequencies and Stall
As far as the inverter power devices are concerned, it is the instantaneous
temperatures of their junctions that matter for correct operation and reliability. As the
current that flows through a particular power device changes through an electrical
cycle so does the loss. At high fundamental output frequencies (e.g., 60 Hz), the
devices have sufficient thermal “mass” to smooth out much of the effect of the
variation in loss, so that the peak device junction is due to the (much lower) average
dissipation. As the output frequency reduces, the peak device junction temperature
reaches the worst case loss.
It is common practice to include a stall detection algorithm in software. This is
designed to not only protect the power components, but also the motor from thermal
overload. As it is impractical to include stall detection in hardware that maintains
flexibility for development but still provides 100% protection, it is assumed that the
software in the dsPIC device provides this feature. The algorithm should monitor rotor
speed and cause a system trip if the rotor speed is at or near zero for greater than an
appropriate length of time while the inverter is energized. A stall trip time of 2 seconds
is suggested.
? 2003 Microchip Technology Inc.
DS70096A-page 13
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